The IXP420 CPU has 16 General Purpose Input/Output (GPIO) pins which are used to interface to external hardware. In the case of the NAS100D, the GPIO pins are used to monitor the buttons, control the LEDs, connect to the RTC, IDE controller and USB 2.0 controller.
| GPIO | IXP Ball | Function | Connected to: | Configured as: |
| GPIO[0] | Y22 | WLAN LED (0 = Green, 1 = Off) | | Input (switch to Output to override) |
| GPIO[1] | W21 | | | Input |
| GPIO[2] | AC26 | | | Input |
| GPIO[3] | AA24 | Disk LED (0 = Yellow, 1 = Off) | Overrides normal green flashing operation | Input (switch to Output to override) |
| GPIO[4] | AB26 | Reset Button (0 = Pushed) | | Input |
| GPIO[5] | Y25 | I²C SDA | RTC - SDA | Input/Tristate |
| GPIO[6] | V21 | I²C SCL | RTC - SCL | Output |
| GPIO[7] | AA26 | PCI INTE (IRQ 24) | Slot 3, Pin 3 (USB EHCI) | Input |
| GPIO[8] | W23 | PCI INTD (IRQ 25) | Slot 3, Pin 2 (USB UHCI) | Input |
| GPIO[9] | V22 | PCI INTC (IRQ 26) | Slot 3, Pin 1 (USB UHCI) | Input |
| GPIO[10] | Y26 | PCI INTB (IRQ 27) | Slot 2, Pin 1 (MiniPCI, WLAN) | Input |
| GPIO[11] | W25 | PCI INTA (IRQ 28) | Slot 1, Pin 1, (IDE Controller) | Input |
| GPIO[12] | W26 | Power Off (1 = Turn Off) | | Input (switch to Output to use) |
| GPIO[13] | V24 | PCI Reset | | Output |
| GPIO[14] | U22 | Power Button (1 = Pushed) | | Input |
| GPIO[15] | U25 | Power LED (0 = Solid Blue, 1 = Flashing Blue) | | Output |
Here is the way to determine GPIO connections:
(From Linux:)
# ./gpio 0
GPOUTR = 0x000020e0
GPOER = 0x00005fdf
GPINR = 0x00002ffd
GPISR = 0x0000a06b
GPIT1R = 0x00201248
GPIT2R = 0x00000249
GPCLKR = 0x00000000
Location 0xc8004000 (GPOUTR) is set to 0x000020e0 (0b0010 0000 1110 0000), meaning GPIO[13,7,6,5] are set to 1.
Location 0xc8004004 (GPOER) is set to 0x00005fdf (0b0101 1111 1101 1111), meaning GPIO[14,12:6,4:0] are inputs or tristated, and GPIO[15,13,5] are outputs.
Location 0xc8004008 (GPINR) is set to 0x00002ffd (0b0010 1111 1111 1101), meaning GPIO[15,14,12,1] are reading as 0, and the rest are reading as 1.
Location 0xc800400c (GPISR) is set to 0x0000a06b (0b1010 0000 0101 1011), meaning there are interrupts pending on GPIO[6,4,3,1,0].
Location 0xc8004010 (GPIT1R) is set to 0x00201248 (0b0000 0000 0010 0000 0001 0010 0100 1000), meaning GPIO[6,5,0] are active high interrupts, and GPIO[7,4:1] are active low interrupts.
Location 0xc8004014 (GPIT2R) is set to 0x00000249 (0b0000 0000 0000 0000 0000 0010 0100 1001), meaning GPIO[11:8] are active high interrupts, and GPIO[12] is an active low interrupt.
Location 0xc8004018 (GPCLKR) is set to 0x00000000 (0b0000 0000 0000 0000 0000 0000 0000 0000), meaning GPIO[15:14] are normal outputs.
(From RedBoot:)
RedBoot> cache off
RedBoot> x -b 0xc8004000
C8004000: 00 00 20 C0 00 00 1F 3F 00 00 AF FD 00 00 A0 C3 |.. ....?........|
C8004010: 00 00 92 48 00 00 02 49 01 7F 01 FF 00 00 00 00 |...H...I........|
Location 0xc8004000 (GPOUTR) is set to 0x000020C0 (0b0010 0000 1100 0000), meaning GPIO[13,7,6] are set to 1.
Location 0xc8004004 (GPOER) is set to 0x00001F3F (0b0001 1111 0011 1111), meaning GPIO[12:8] and GPIO[5:0] are inputs or tristated, and GPIO[15:13] and GPIO[7:6] are outputs.
Location 0xc8004008 (GPINR) is set to 0x0000affd (0b1010 1111 1111 1101), meaning GPIO[14,12,1] are reading as 0, and the rest are reading as 1.
Location 0xc800400c (GPISR) is set to 0x0000a0d3 (0b1010 0000 1101 0011), meaning there are interrupts pending on GPIO[7,6,4,1,0].
Location 0xc8004010 (GPIT1R) is set to 0x00009248 (0b0000 0000 0000 0000 1001 0010 0100 1000), meaning GPIO[7,6,0] are active high interrupts, and GPIO[5:1] are active low interrupts.
Location 0xc8004014 (GPIT2R) is set to 0x00000249 (0b0000 0000 0000 0000 0000 0010 0100 1001), meaning GPIO[11:8] are active high interrupts, and GPIO[12] is an active low interrupt.
Location 0xc8004018 (GPCLKR) is set to 0x017f01ff (0b0000 0001 0111 1111 0000 0001 1111 1111), meaning GPIO[15:14] are clock outputs.