NSLU2-Linux
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Info.PinoutOfJTAGPort History

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November 27, 2008, at 09:42 PM by vs -- bad link
Changed lines 32-33 from:

Update (as of 27-Nov-2008): urjtag supports the NSLU2 natively (it is a fork of the openwince jtag tool). More about urjtag + slug in RecoverFromABadFlashUsingJTAG?.

to:

Update (as of 27-Nov-2008): urjtag supports the NSLU2 natively (it is a fork of the openwince jtag tool). More about urjtag + slug in RecoverFromABadFlashUsingJTAG.

November 27, 2008, at 09:41 PM by vs -- Ref. to wiki page
Changed lines 32-33 from:

Update (as of 27-Nov-2008): urjtag supports the NSLU2 natively (it is a fork of the openwince jtag tool).

to:

Update (as of 27-Nov-2008): urjtag supports the NSLU2 natively (it is a fork of the openwince jtag tool). More about urjtag + slug in RecoverFromABadFlashUsingJTAG?.

November 27, 2008, at 09:37 PM by vs -- blue -> green
Changed lines 32-33 from:

Update (as of 27-Nov-2008): urjtag supports the NSLU2 natively (it is a fork of the openwince jtag tool).

to:

Update (as of 27-Nov-2008): urjtag supports the NSLU2 natively (it is a fork of the openwince jtag tool).

November 27, 2008, at 09:36 PM by vs -- Point to urjtag too, which supports the slug natively.
Added lines 32-33:

Update (as of 27-Nov-2008): urjtag supports the NSLU2 natively (it is a fork of the openwince jtag tool).

August 16, 2005, at 01:27 PM by tman --
Changed lines 3-7 from:
TDIBall AE24Connected to R133
TMSBall AF25Connected to R132
TCKBall AF26Connected to R134/R138
TDOBall AD23Connected to R137
TRSTn (Optional)Ball AC22Connected to R135
to:
TDIBall AE24Connected to LHS R133
TMSBall AF25Connected to LHS R132
TCKBall AF26Connected to LHS R134/R138
TDOBall AD23Connected to LHS R137
TRSTn (Optional)Ball AC22Connected to bottom of R135
June 01, 2005, at 11:21 PM by tman -- Rewritten bricked text
Changed lines 16-17 from:

One popular use for JTAG (and what we're primarily interested in) is to do in-circuit programming of the flash memory chips in the system (as in the case where we've bricked the unit with a bad flash image). There are several commercial and one Open Source system that appear to be able to do this for the Intel processor the NSLU2 uses.

to:

One popular use for JTAG (and what we're primarily interested in) is to do in-circuit programming of the flash memory chips in the system. For our case this is for when we've made the NSLU2 unbootable by replacing the bootloader with a broken copy. The official Linksys firmware, Unslung and OpenSlug do NOT alter the bootloader so you are safe from this. There are several commercial and one Open Source system that appear to be able to do this for the Intel processor the NSLU2 uses.

June 01, 2005, at 05:02 PM by tman --
Changed line 83 from:
         Device Size: 8388608 B (8192 KiB?, 8 MiB?)
to:
         Device Size: 8388608 B (8192 KiB, 8 MiB)
Changed line 89 from:
                        Erase Block Size: 131072 B (128 KiB?)
to:
                        Erase Block Size: 131072 B (128 KiB)
June 01, 2005, at 05:00 PM by tman --
Changed lines 10-13 from:

JTAG users may also need the IXP4xx signal RESET_IN_N (ball AC13). the trace takes a tortured path, via under CPU to become the trace closest to edge of board by R145. then via under Q8, connect to Q8 pin 1. then on to lower side of R75 and R76 (missing). then under the flash chip, and I think to flash pin 15 (Vpen), and thru a via to the right side of R140 (missing). This signal is driven by an open-collector circuit. Q8 (most likely) is an EM6325?.

Note on TRSTn: This signal is actively driven (R135 is 0 Ohm !). It gets deasserted 400ms before RESET_IN_N is deasserted. If You want to drive this signal You have to deinstall R135. Do not forget to add a Pull-Down (10K) - else the JTAG controller in the CPU will not be properly initialized during reset.

to:

JTAG users may also need the IXP4xx signal RESET_IN_N (ball AC13). the trace takes a tortured path, via under CPU to become the trace closest to edge of board by R145. then via under Q8, connect to Q8 pin 1. then on to lower side of R75 and R76 (missing). then under the flash chip, and I think to flash pin 15 (Vpen), and thru a via to the right side of R140 (missing). This signal is driven by an open-collector circuit. Q8 (most likely) is an EM6325 reset circuit with manual reset (1.3V-4.6V, SOT23?) datasheet at: http://www.emmicroelectronic.com/

Note on TRSTn: This signal is actively driven (R135 is a 0 Ohm jumper). It gets deasserted 400ms before RESET_IN_N is deasserted. If you want to drive this signal you have to remove R135. Do not forget to add a 10k pulldown otherwise the JTAG TAP in the IXP420 CPU will not be properly initialized during reset.

June 01, 2005, at 07:16 AM by ep1220 --
Changed lines 12-13 from:

Note on TRSTn?: This signal is actively driven (R135 is 0 Ohm !). It gets deasserted 400ms before RESET_IN_N is deasserted. If You want to drive this signal You have to deinstall R135. Do not forget to add a Pull-Down (10K) - else the JTAG controller in the CPU will not be properly initialized during reset.

to:

Note on TRSTn: This signal is actively driven (R135 is 0 Ohm !). It gets deasserted 400ms before RESET_IN_N is deasserted. If You want to drive this signal You have to deinstall R135. Do not forget to add a Pull-Down (10K) - else the JTAG controller in the CPU will not be properly initialized during reset.

June 01, 2005, at 07:13 AM by ep1220 -- added Note about TRSTn, details on RESET_IN_N
Changed lines 10-11 from:

JTAG users may also need the IXP4xx signal RESET_IN_N (ball AC13). the trace takes a tortured path, via under CPU to become the trace closest to edge of board by R145. then via under Q8, connect to Q8 pin 1. then on to lower side of R75 and R76 (missing). then under the flash chip, and I think to flash pin 15 (Vpen), and thru a via to the right side of R140 (missing)

to:

JTAG users may also need the IXP4xx signal RESET_IN_N (ball AC13). the trace takes a tortured path, via under CPU to become the trace closest to edge of board by R145. then via under Q8, connect to Q8 pin 1. then on to lower side of R75 and R76 (missing). then under the flash chip, and I think to flash pin 15 (Vpen), and thru a via to the right side of R140 (missing). This signal is driven by an open-collector circuit. Q8 (most likely) is an EM6325?.

Note on TRSTn?: This signal is actively driven (R135 is 0 Ohm !). It gets deasserted 400ms before RESET_IN_N is deasserted. If You want to drive this signal You have to deinstall R135. Do not forget to add a Pull-Down (10K) - else the JTAG controller in the CPU will not be properly initialized during reset.

May 27, 2005, at 08:34 PM by tman --
Changed lines 8-10 from:

JTAG users may also need the IXP4xx? signal RESET_IN_N (ball AC13?). the trace takes a tortured path, via under cpu to become the trace closest to edge of board by r145. then via under Q8, connect to Q8 pin 1. then on to lower side of r75 and r76 (missing). then under flash chip, and i think to flash pin 15 (Vpen), and thru a via to the right side of r140 (missing)

to:
RESET_IN_NBall AC13See below

JTAG users may also need the IXP4xx signal RESET_IN_N (ball AC13). the trace takes a tortured path, via under CPU to become the trace closest to edge of board by R145. then via under Q8, connect to Q8 pin 1. then on to lower side of R75 and R76 (missing). then under the flash chip, and I think to flash pin 15 (Vpen), and thru a via to the right side of R140 (missing)

Changed lines 26-27 from:

The BSDL file for the IXP420 can be found on it's product page.

to:

The BSDL file for the IXP420 can be found on the IXP42x product page.

May 26, 2005, at 02:06 AM by kitno455 -- added RESET_IN_N
Added lines 9-10:

JTAG users may also need the IXP4xx? signal RESET_IN_N (ball AC13?). the trace takes a tortured path, via under cpu to become the trace closest to edge of board by r145. then via under Q8, connect to Q8 pin 1. then on to lower side of r75 and r76 (missing). then under flash chip, and i think to flash pin 15 (Vpen), and thru a via to the right side of r140 (missing)

February 27, 2005, at 10:55 PM by ka6sox --
Changed line 21 from:

If you wish to use JTAG Tools then you must add the IXP4xx? @ 266MHz ident string (1001001001110111) to jtag/intel/PARTS and the B0 stepping (0001) to jtag/intel/ixp425/STEPPINGS

to:

If you wish to use JTAG Tools then you must add the IXP4xx @ 266MHz ident string (1001001001110111) to jtag/intel/PARTS and the B0 stepping (0001) to jtag/intel/ixp425/STEPPINGS

Changed lines 39-40 from:
 jtag> cable parallel 0x378 ByteBlaster?
 Initializing Altera ByteBlaster?/ByteBlaster? II/ByteBlasterMV? Parallel Port Download Cable on parallel port at 0x378
to:
 jtag> cable parallel 0x378 ByteBlaster
 Initializing Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable on parallel port at 0x378
Changed line 47 from:
   Part:         IXP4xx?-266MHz
to:
   Part:         IXP4xx-266MHz
Changed line 54 from:
    0 Intel                     IXP4xx?-266MHz        B0       BYPASS       BR
to:
    0 Intel                     IXP4xx-266MHz        B0       BYPASS       BR
November 20, 2004, at 02:56 AM by tman --
Changed line 7 from:
TRSTnBall AC22Connected to R135
to:
TRSTn (Optional)Ball AC22Connected to R135
October 19, 2004, at 12:39 AM by tman --
Changed line 7 from:
TRSTn?Ball AC22Connected to R135
to:
TRSTnBall AC22Connected to R135
Changed lines 9-22 from:

JTAG is an IEEE standard 1149.1 for in-circuit testing of complex electronic systems, typically using FPGAs or microprocessors. In essence, it allows one to switch off and bypass the internal functionality of a chip and take external control of its I/O lines to provide test stimulus to the rest of the circuit it's in. See also http://www.ee.ic.ac.uk/pcheung/teaching/ee3_DSD/ti_jtag_seminar.pdf for a tutorial, or Google for JTAG, Linux, Intel etc.

One popular use for JTAG (and what we're primarily interested in) is to do in-circuit programming of the flash memory chips in the system (as in the case where we've bricked the unit with a bad flash image). There are several commercial and one Open Source system that appear to be able to do this for the Intel processor the NSLU2 uses.

to:

JTAG is a IEEE standard 1149.1 for in-circuit testing of complex electronic systems, typically using FPGAs or microprocessors. In essence, it allows one to switch off and bypass the internal functionality of a chip and take external control of its I/O lines to provide test stimulus to the rest of the circuit it's in. See also http://www.ee.ic.ac.uk/pcheung/teaching/ee3_DSD/ti_jtag_seminar.pdf for a tutorial, or Google for JTAG, Linux, Intel etc.

One popular use for JTAG (and what we're primarily interested in) is to do in-circuit programming of the flash memory chips in the system (as in the case where we've bricked the unit with a bad flash image). There are several commercial and one Open Source system that appear to be able to do this for the Intel processor the NSLU2 uses.

Changed line 19 from:

The JTAG port has been tested and found to be working with a http://www.altera.com/literature/ds/dsbytemv.pdf Altera ByteBlaster MV cable and a http://www.abatron.ch/ BDI2000 JTAG interface. The JTAG interface was connected directly to the pads on the NSLU2. No pullup resistors were needed.

to:

The JTAG port has been tested and found to be working with a http://www.altera.com/literature/ds/dsbytemv.pdf Altera ByteBlaster MV cable, Digilent Xilinx III clone cable and a http://www.abatron.ch/ BDI2000 JTAG interface. The JTAG interface was connected directly to the pads on the NSLU2. No pullup resistors were needed.

October 09, 2004, at 09:26 PM by tman --
Changed lines 2-6 from:
TDIball AE24connected to R133
TMSball AF25connected to R132
TCKball AF26connected to R134/R138
TDOball AD23connected to R137
TRSTNball AC22connected to R135
to:
JTAG SignalIXP420 BallPCB Location
TDIBall AE24Connected to R133
TMSBall AF25Connected to R132
TCKBall AF26Connected to R134/R138
TDOBall AD23Connected to R137
TRSTn?Ball AC22Connected to R135
September 22, 2004, at 09:23 PM by tman --
Changed line 23 from:

IXP425 Ident : 1001001001110111 ixp425 IXP425-266MHz (dyoung)

to:

IXP420 Ident : 1001001001110111 ixp425 IXP4xx-266MHz (dyoung)

Changed line 31 from:

If you wish to use JTAG Tools then you must add the IXP425 @ 266MHz ident string (1001001001110111) to jtag/intel/PARTS and the B0 stepping (0001) to jtag/intel/ixp425/STEPPINGS

to:

If you wish to use JTAG Tools then you must add the IXP4xx? @ 266MHz ident string (1001001001110111) to jtag/intel/PARTS and the B0 stepping (0001) to jtag/intel/ixp425/STEPPINGS

Changed line 33 from:

The http://www.intel.com/design/network/products/npfamily/ixp425.htm BSDL file for the http://www.intel.com/design/network/products/npfamily/ixp425.htm IXP425 can be found on it's http://www.intel.com/design/network/products/npfamily/ixp425.htm product page.

to:

The http://www.intel.com/design/network/products/npfamily/ixp425.htm BSDL file for the http://www.intel.com/design/network/products/npfamily/ixp425.htm IXP420 can be found on it's http://www.intel.com/design/network/products/npfamily/ixp425.htm product page.

Changed line 57 from:
   Part:         IXP425-266MHz
to:
   Part:         IXP4xx?-266MHz
Changed line 64 from:
    0 Intel                     IXP425-266MHz        B0       BYPASS       BR
to:
    0 Intel                     IXP4xx?-266MHz        B0       BYPASS       BR
September 19, 2004, at 02:26 AM by tman --
Changed line 19 from:

(as in the case where we'be bricked the unit with a bad flash image).

to:

(as in the case where we've bricked the unit with a bad flash image).

Changed line 29 from:

The JTAG port has been tested and found to be working with a Altera ByteBlaster? MV cable and a BDI2000? JTAG interface. The JTAG interface was connected directly to the pads on the NSLU2. No pullup resistors were needed.

to:

The JTAG port has been tested and found to be working with a http://www.altera.com/literature/ds/dsbytemv.pdf Altera ByteBlaster MV cable and a http://www.abatron.ch/ BDI2000 JTAG interface. The JTAG interface was connected directly to the pads on the NSLU2. No pullup resistors were needed.

Changed line 31 from:

If you wish to use JTAG Tools then you must add IXP425 @ 266MHz ident string (1001001001110111) to jtag/intel/PARTS and the B0 stepping (0001) to jtag/intel/ixp425/STEPPINGS

to:

If you wish to use JTAG Tools then you must add the IXP425 @ 266MHz ident string (1001001001110111) to jtag/intel/PARTS and the B0 stepping (0001) to jtag/intel/ixp425/STEPPINGS

Changed lines 33-35 from:

The http://www.intel.com/design/network/products/npfamily/ixp425.htm BSDL file for the http://www.intel.com/design/network/products/npfamily/ixp425.htm IXP 425 can be found on it's http://www.intel.com/design/network/products/npfamily/ixp425.htm product page.

to:

The http://www.intel.com/design/network/products/npfamily/ixp425.htm BSDL file for the http://www.intel.com/design/network/products/npfamily/ixp425.htm IXP425 can be found on it's http://www.intel.com/design/network/products/npfamily/ixp425.htm product page.

DO NOT USE THE JTAG PORT UNLESS YOU KNOW WHAT YOU'RE DOING!

September 19, 2004, at 01:02 AM by tman --
Changed line 10 from:

essence, it allows one to swith off and bypass the internal

to:

essence, it allows one to switch off and bypass the internal

September 19, 2004, at 01:02 AM by tman --
Deleted lines 28-29:

(tman)

Added lines 32-33:

The http://www.intel.com/design/network/products/npfamily/ixp425.htm BSDL file for the http://www.intel.com/design/network/products/npfamily/ixp425.htm IXP 425 can be found on it's http://www.intel.com/design/network/products/npfamily/ixp425.htm product page.

September 19, 2004, at 01:00 AM by tman --
Changed line 23 from:

IXP425 Ident : 1001001001110111 ixp425 IXP425 (dyoung)

to:

IXP425 Ident : 1001001001110111 ixp425 IXP425-266MHz (dyoung)

Changed lines 27-93 from:

[http://groups.yahoo.com/group/nslu2-linux/message/428]

to:

[http://groups.yahoo.com/group/nslu2-linux/message/428]

(tman)

The JTAG port has been tested and found to be working with a Altera ByteBlaster? MV cable and a BDI2000? JTAG interface. The JTAG interface was connected directly to the pads on the NSLU2. No pullup resistors were needed.

If you wish to use JTAG Tools then you must add IXP425 @ 266MHz ident string (1001001001110111) to jtag/intel/PARTS and the B0 stepping (0001) to jtag/intel/ixp425/STEPPINGS

Example run using http://openwince.sourceforge.net/jtag/ JTAG Tool 0.51:

 JTAG Tools 0.5.1
 Copyright (C) 2002, 2003 ETC s.r.o.
 JTAG Tools is free software, covered by the GNU General Public License, and you are
 welcome to change it and/or distribute copies of it under certain conditions.
 There is absolutely no warranty for JTAG Tools.

 Warning: JTAG Tools may damage your hardware! Type "quit" to exit!

 Type "help" for help.

 jtag> cable parallel 0x378 ByteBlaster?
 Initializing Altera ByteBlaster?/ByteBlaster? II/ByteBlasterMV? Parallel Port Download Cable on parallel port at 0x378

 jtag> detect
 IR length: 7
 Chain length: 1
 Device Id: 00011001001001110111000000010011
   Manufacturer: Intel
   Part:         IXP425-266MHz
   Stepping:     B0
   Filename:     /usr/local/share/jtag/intel/ixp425/ixp425

 jtag> print
  No. Manufacturer              Part                 Stepping Instruction  Register
 ---------------------------------------------------------------------------------------------
    0 Intel                     IXP425-266MHz        B0       BYPASS       BR

 Active bus:
 *0: Intel IXP425 compatible bus driver via BSR (JTAG part No. 0)
         start: 0x00000000, length: 0x100000000, data width: 16 bit

 jtag> detectflash
 Query identification string:
         Primary Algorithm Command Set and Control Interface ID Code: 0x0001 (Intel/Sharp Extended Command Set)
         Alternate Algorithm Command Set and Control Interface ID Code: 0x0000 (null)
 Query system interface information:
         Vcc Logic Supply Minimum Write/Erase or Write voltage: 2700 mV
         Vcc Logic Supply Maximum Write/Erase or Write voltage: 3600 mV
         Vpp [Programming] Supply Minimum Write/Erase voltage: 0 mV
         Vpp [Programming] Supply Maximum Write/Erase voltage: 0 mV
         Typical timeout per single byte/word program: 256 us
         Typical timeout for maximum-size multi-byte program: 256 us
         Typical timeout per individual block erase: 2048 ms
         Typical timeout for full chip erase: 0 ms
         Maximum timeout for byte/word program: 1024 us
         Maximum timeout for multi-byte program: 1024 us
         Maximum timeout per individual block erase: 16384 ms
         Maximum timeout for chip erase: 0 ms
 Device geometry definition:
         Device Size: 8388608 B (8192 KiB?, 8 MiB?)
         Flash Device Interface Code description: 0x0002 (x8/x16)
         Maximum number of bytes in multi-byte program: 32
         Number of Erase Block Regions within device: 1
         Erase Block Region Information:
                 Region 0:
                        Erase Block Size: 131072 B (128 KiB?)
                        Number of Erase Blocks: 64
September 18, 2004, at 10:57 AM by ka6sox --
Changed line 23 from:

IXP425 Ident : 1001001001110111 ixp425 IXP425 (dyoung)

to:

IXP425 Ident : 1001001001110111 ixp425 IXP425 (dyoung)

September 18, 2004, at 10:57 AM by ka6sox --
Added lines 23-24:

IXP425 Ident : 1001001001110111 ixp425 IXP425 (dyoung)

September 14, 2004, at 11:20 PM by ka6sox --
Changed line 9 from:

electronic systems, typically using FPGAs? or microprocessors. In

to:

electronic systems, typically using FPGAs or microprocessors. In

September 14, 2004, at 11:00 PM by ka6sox --
Added lines 23-24:
September 14, 2004, at 06:38 AM by rwhitby --
Changed lines 2-6 from:
to:
TDIball AE24connected to R133
TMSball AF25connected to R132
TCKball AF26connected to R134/R138
TDOball AD23connected to R137
TRSTNball AC22connected to R135
September 14, 2004, at 06:37 AM by rwhitby --
Added line 1:
September 14, 2004, at 06:37 AM by rwhitby --
Changed lines 1-5 from:

TDI | ball AE24 | connected to R133
TMS | ball AF25 | connected to R132
TCK | ball AF26 | connected to R134/R138
TDO | ball AD23 | connected to R137
TRSTN | ball AC22 | connected to R135

to:
September 14, 2004, at 06:36 AM by rwhitby --
Changed lines 1-5 from:

TDI ball AE24 connected to R133
TMS ball AF25 connected to R132
TCK ball AF26 connected to R134/R138
TDO ball AD23 connected to R137
TRSTN ball AC22 connected to R135

to:

TDI | ball AE24 | connected to R133
TMS | ball AF25 | connected to R132
TCK | ball AF26 | connected to R134/R138
TDO | ball AD23 | connected to R137
TRSTN | ball AC22 | connected to R135

September 14, 2004, at 06:35 AM by rwhitby --
Changed line 5 from:

TRSTN ball AC22 connected to R135\\

to:

TRSTN ball AC22 connected to R135

September 14, 2004, at 06:35 AM by rwhitby --
Added lines 7-21:

JTAG is an IEEE standard 1149.1 for in-circuit testing of complex electronic systems, typically using FPGAs? or microprocessors. In essence, it allows one to swith off and bypass the internal functionality of a chip and take external control of its I/O lines to provide test stimulus to the rest of the circuit it's in. See also http://www.ee.ic.ac.uk/pcheung/teaching/ee3_DSD/ti_jtag_seminar.pdf for a tutorial, or Google for JTAG, Linux, Intel etc.

One popular use for JTAG (and what we're primarily interested in) is to do in-circuit programming of the flash memory chips in the system (as in the case where we'be bricked the unit with a bad flash image). There are several commercial and one Open Source system that appear to be able to do this for the Intel processor the NSLU2 uses.

September 13, 2004, at 06:18 AM by ka6sox --
Changed lines 1-5 from:

TDI ball AE24? connected to R133
TMS ball AF25? connected to R132
TCK ball AF26? connected to R134/R138
TDO ball AD23? connected to R137
TRSTN ball AC22? connected to R135\\

to:

TDI ball AE24 connected to R133
TMS ball AF25 connected to R132
TCK ball AF26 connected to R134/R138
TDO ball AD23 connected to R137
TRSTN ball AC22 connected to R135\\

September 13, 2004, at 06:16 AM by ka6sox --
Changed lines 1-7 from:

Describe PinoutOfJTAGPort here.

to:

TDI ball AE24? connected to R133
TMS ball AF25? connected to R132
TCK ball AF26? connected to R134/R138
TDO ball AD23? connected to R137
TRSTN ball AC22? connected to R135
[http://groups.yahoo.com/group/nslu2-linux/message/428]

view · edit · print · history · Last edited by vs.
Based on work by vs, tman, ep1220, kitno455, ka6sox, and rwhitby.
Originally by ka6sox.
Page last modified on November 27, 2008, at 09:42 PM