NSLU2-Linux
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Info.IXPConfigurationRegisters History

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August 07, 2005, at 04:10 PM by tman -- Corrected mistake in the ID portion
Changed lines 12-14 from:
A18R146User Config 1 - Arbitary ID/revision10K pull downUnknown ID - Manufacturer defined
A19R84User Config 2 - Arbitary ID/revision10K pull downUnknown ID - Manufacturer defined
A20R80User Config 3 - Arbitary ID/revision10K pull downUnknown ID - Manufacturer defined
to:
A18R84User Config 1 - Arbitary ID/revision10K pull downUnknown ID - Manufacturer defined
A19R80User Config 2 - Arbitary ID/revision10K pull downUnknown ID - Manufacturer defined
A20R82User Config 3 - Arbitary ID/revision10K pull downUnknown ID - Manufacturer defined
July 01, 2005, at 12:38 AM by tman --
Changed line 10 from:
A4R65PCI_CLK - Sets the clock speed of the PCI Interface10K pull down33MHz
to:
A4R65PCI_CLK - PCI interface clock speed10K pull down33MHz
July 01, 2005, at 12:34 AM by tman -- Added info on config register 0
Added lines 1-22:

Configuration Register 0

The IXP420 at reset loads some of its configuration registers from strapping resistors connected to the expansion bus. For more details see page 325 of the IXP420 developer's manual.

Expansion busStrapping resistorNameLinksys defaultMeaning
A0R628/16 FLASH - Data bus width of the flash10K pull down16-bit data bus for the flash
A1??PCI_HOST - PCI controller as PCI bus HostNo pull downPCI as host
A2??PCI_ARB - PCI controller arbiterNo pull downPCI arbiter enabled
A4R65PCI_CLK - Sets the clock speed of the PCI Interface10K pull down33MHz
A17??User Config 0 - Arbitary ID/revisionNo pull downUnknown ID - Manufacturer defined
A18R146User Config 1 - Arbitary ID/revision10K pull downUnknown ID - Manufacturer defined
A19R84User Config 2 - Arbitary ID/revision10K pull downUnknown ID - Manufacturer defined
A20R80User Config 3 - Arbitary ID/revision10K pull downUnknown ID - Manufacturer defined
A21R83Clock Set 0 - XScale core clock divider setting10K pull downTogether with A22 and A23 = 133MHz
A22R81Clock Set 1 - XScale core clock divider settingEmptyTogether with A21 and A23 = 133MHz
A23R64Clock Set 2 - XScale core clock divider setting10K pull downTogether with A21 and A22 = 133MHz
A31??MEM_MAP - Location of expansion bus in memory map10K pull downLocated at "50000000" (normal mode)

See HowTo.OverClockTheSlug for more details on how to change the XScale core speed.

All other bits are reserved.

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Originally by tman.
Page last modified on August 07, 2005, at 04:10 PM